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ATmega128
Table 59 shows the COMnx1:0 bit functionality when the W GMn3:0 bits are set to the fast P W M
mode
Table 59. Compare Output Mode, Fast P W M
COMnA1/COMnB1/
COMnA0/COMnB0/
COMnC1
0
0
1
1
COMnC0
0
1
0
1
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
W GMn3:0 = 15: Toggle OCnA on Compare
Match, OCnB/OCnC disconnected (normal
port operation).
For all other W GMn settings, normal port
operation, OCnA/OCnB/OCnC
disconnected.
Clear OCnA/OCnB/OCnC on compare
match, set OCnA/OCnB/OCnC at BOTTOM,
(non-inverting mode)
Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at BOTTOM,
(inverting mode)
Note:
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the set or clear
is done at BOTTOM. See “Fast P W M Mode” on page 124. for more details.
Table 59 shows the COMnx1:0 bit functionality when the W GMn3:0 bits are set to the phase cor-
rect and frequency correct P W M mode.
Table 60. Compare Output Mode, Phase Correct and Phase and Frequency Correct P W M
COMnA1/COMnB1/
COMnA0/COMnB0/
COMnC1
0
0
1
1
COMnC0
0
1
0
1
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
W GMn3:0 = 9 or 11: Toggle OCnA on
Compare Match, OCnB/OCnC disconnected
(normal port operation).
For all other W GMn settings, normal port
operation, OCnA/OCnB/OCnC
disconnected.
Clear OCnA/OCnB/OCnC on compare
match when up-counting. Set
OCnA/OCnB/OCnC on compare match
when downcounting.
Set OCnA/OCnB/OCnC on compare match
when up-counting. Clear
OCnA/OCnB/OCnC on compare match
when downcounting.
Note:
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1//COMnC1 is set. See “Phase Correct P W M Mode” on page 126. for more
details.
133
2467X–AVR–06/11
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